ae401e4b18
People reportedly want to compile the stub on i686 and AArch64 platforms for testing. Make compilation possible by providing proper `make_instruction_cache_coherent` implementations on these platforms. For x86 (just as x86_64), this is a no-op, because Intel made the instruction cache coherent for compatibility with code that was written before caches existed. For AArch64, adapt the procedure from their manual to multiple instructions. |
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| .cargo | ||
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| Cargo.lock | ||
| Cargo.toml | ||
| rust-toolchain.toml | ||